As device dimensions shrink into the nanoscale generation, advanced process research and development capable of integrating 0D and 1D nanostructured materials into semiconductor nanodevices has received widespread attention in recent years. However, regulating the preparation of large-area, regularly arranged, and uniformly sized nanostructures has always been a major challenge that needs to be overcome in related processes. Furthermore, regarding practical device applications, the interfacial reactions between nanostructured materials of different dimensions and silicon-based semiconductor wafers, along with the corresponding property changes, are often the primary considerations for whether these nanostructured materials can be truly integrated into future advanced semiconductor devices. Therefore, the correlations between the crystal structure, phase transformation, composition distribution, thermal stability, size, and shape of nanomaterials and their physical and chemical property changes require more in-depth research. Mastering the growth mechanisms and atomic arrangement structures of nanoparticles, nanowires, and nanotubes will help control the generation of high-quality nanomaterials and further integrate them into the research and preparation of functional nanostructured devices.

Current research focuses of this laboratory include:
1. Promoting the formation and thermal stability of low-resistance metal contacts on silicon and silicon-germanium semiconductor substrates.
2. Preparation, characterization, and analysis of metal and semiconductor nanomaterials.
3. Manipulating the growth of novel nanostructured arrays with different dimensions and ordered arrangements using nano-template methods.
4. Interfacial reactions and material property testing between multi-dimensional nanomaterial arrays and silicon-based semiconductor wafers.